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march 2003 adcs 7269750b 1/41 stv0674 tri-mode cmos digital camera co-processor ? description the stv0674 is a flexible, scalable digital camera co-processor for use with the range of cmos imaging sensor products from stmicroelectronics. the same chipset can be used for a wide range of digital imaging products with unique features and price/performance points. the stv0674 is designed for use with cif (352x288) or vga (640x480) st cmos image sensors and provides full exposure control, color processing and mode control for these sensors. the stv0674 can be used to implement any of the following products: low cost usb webcam camera - a two-chip solution providing up to 30 frames per second vga simultaneous video and audio capture. dual-mode camera - usb webcam and cif or vga digital still camera in a single product. tri-mode camera - usb webcam and digital still camera with the addition of a camcorder mode to allow simultaneous video and audio capture directly to external memory for later upload to the pc. features n 100tqfp or 64tqfp package l 100tqfp for dual and tri mode cameras l 64tqfp for webcam with audio n vga or cif cmos sensor support n hardware color processing and jpeg compression of image data n still image capture n tethered video operation over usb l simultaneous video and audio capture n usb l usb for pc and macos (in development) n flexible external memory options l sdram for lower cost, (8 or 16 bit) l flash for non volatile storage (data + code) l smartmedia card for removable data storage l eeprom for code storage n record simultaneous video and audio direct to memory while untethered n drivers for pc operating systems win98, winme, win2k and win xp. application block diagram lcd image display nand flash lcd icon display smartmedia flash card socket sdram x16 or x8 audio playback power amp buzzer 5 usb interface memory processor microphone to host pc or video processor video compression micro audio interface usb cable removable or stv0674 100qfp user interface buttons/ switches image array + boot ee- -prom lcd driver chip lcd driver chip stmicroelectonics cmos sensor gpio flashgun module oem hardware enabled firmware enabled
stv0674 2/41 table of contents chapter 1 overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 1.1 webcam mode ................................................................................................................ ..... 5 1.2 dual-mode (webcam plus digital still camera) ................................................................... 5 1.3 tri-mode (webcam plus digital still camera plus digital movie/audio recorder) ............... 5 chapter 2 stv0674 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 2.1 sensor interface ........................................................................................................... ........ 6 2.2 video processor ............................................................................................................ ....... 6 2.3 video compressor ........................................................................................................... .... 6 2.4 microcontroller ............................................................................................................ .......... 7 2.5 memory interfaces .......................................................................................................... ...... 7 2.6 audio record ............................................................................................................... .......... 8 2.7 audio playback ............................................................................................................. ........ 8 2.8 usb pc interface ........................................................................................................... ...... 8 2.9 power requirements ......................................................................................................... .... 8 chapter 3 stv0674 application examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 3.1 64tqfp webcam with audio ................................................................................................ 9 3.2 100tqfp tri-mode camera ............................................................................................... 10 chapter 4 detailed specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.1 stv0674 absolute maximum ratings ................................................................................. 11 4.2 stv0674 dc characteristics .............................................................................................. 11 4.3 sdram interface ............................................................................................................ ... 13 4.4 nand flash interface ....................................................................................................... ... 15 4.5 usb interface .............................................................................................................. ....... 20 4.6 audio ...................................................................................................................... ............ 21 4.7 sfp ac parameters .......................................................................................................... .22 4.8 sensor interface ........................................................................................................... ...... 22 4.9 device current consumption in run and suspend modes ................................................... 23 chapter 5 64tqfp pinout and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 5.1 64tqfp device pinout ....................................................................................................... 24
3/41 stv0674 5.2 64tqfp pin description ..................................................................................................... 26 5.3 64tqfp package details .................................................................................................... 2 9 chapter 6 100tqfp pinout and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 6.1 100tqfp device pinout ..................................................................................................... 3 0 6.2 100tqfp pin descriptions .................................................................................................. 3 2 6.3 100tqfp package details .................................................................................................. 37 6.4 external circuits .......................................................................................................... ........ 38 chapter 7 evaluation kits and reference design manual . . . . . . . . . . . . . . . . . . . . . . . . . .39 7.1 evaluation kit ............................................................................................................. ......... 39 chapter 8 ordering details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 0
stv0674 4/41 revision history revision date changes a 03/10/2001 initial release b 16/08/2002 expansion of ac /dc specifications section 7 added figures 11 and 14, signals identified by functional group detail added to ta bl e 1 0 , pull down on sfp 19 required detail added to ta bl e 1 2 , pull down on sfp 14 required
5/41 stv0674 overview 1 overview the stv0674 can be used to implement 3 different low cost cmos camera products: 1.1 webcam mode stv0674 in 64qfp allows a two-chip solution to provide a usb webcam, which can acquire and display images on the host system at frame rates of up to 30fps vga. the addition of an external microphone allows simultaneous audio acquisition. custom drivers require an additional low cost eeprom which allows usb parameters such as vendor id /product id to be customised. 1.2 dual-mode (webcam plus digital still camera) while retaining all the features of the webcam, the addition of external storage memory allows the functionality of a digital still camera. on-chip jpeg compression permits high-density picture storage. 16mbit to 128mbit of sdram (8 or 16 bit) and/or 32mbit to 1gbit nand flash memory are supported by the device in 100tqfp. also supported are the popular smart media cards (smc) to extend non-volatile storage capability. the wide range of memory support allows the camera builder to tailor the system cost to suit their target market. a continuous image acquisition mode allows untethered (no host connection) video clips to be taken. as an example, with 15:1 compression ratio and 128mbit memory over two minutes (qvga @10fps) worth of video can be stored and up-loaded for display on the host. full direct show driver support for windows 98se, me, windows 2000, win xp is available. macos is currently in development. 1.3 tri-mode (webcam plus digital still camera plus digital movie/audio recorder) again, retaining the features of the webcam and dual mode cameras, the inclusion of audio record and playback circuitry adds another dimension to the product. an in-system microphone allows audio to be recorded and played back either via a speaker on the camera or via the host sound system. audio can either be recorded simultaneously with video (camcorder) or independently of image acquisition (dictaphone). audio data can also be downloaded from the host and played back on the camera when events take place. this allows any sampled soundbites to be played back on cameras, as opposed to the normal beeps from traditional cameras, which offers many possibilities for language customisation or licensed character cameras. as well as the memory and audio options already described, the gpio and firmware emulation make it possible to support other custom peripherals such as icon or area displays. other custom peripherals such as icon or area displays can be support via uncommitted general purpose i/o under firmware control. st microelectronics provides a software development kit (sdk) allowing oems to create custom pc applications, and an oem pack to modify drivers to their specific requirements.
stv0674 functional description stv0674 6/41 2 stv0674 functional description the stv0674 uses a combination of hardware functions and firmware to implement the required features. while the following features are selected and controlled via firmware their operation is carried out by dedicated hardware core. all dedicated hardware functions use fixed pin numbers which are detailed in section 5.2 or section 6.2 2.1 sensor interface the sensor interface is compatible with st microelectronics cif and vga sensors. this interface consists of a 5 wire sensor data output with additional sync signals, clocking, and i 2 c interface for configuration. all sensor communications, exposure/gain control, color processing, white balance control, and clocking are handled automatically by stv0674. 2.2 video processor the video processor (vp) provides formatted ycbcr 4:2:2-sampled digital video at frame rates up to 30 frames per second to the video compressor (vc) module or internal video fifo. the vp also interfaces directly to the image sensors. the interface to the sensor incorporates: l a 5-wire data bus sdata[4:0] for receiving both video data and embedded timing references. l a 2-wire serial interface ssda,sscl to control the sensor and configuration of the sensor registers. l the sensor clock sclk. the video processing engine performs the following functions on incoming data l full colour restoration at each pixel site from bayer-patterned input data l defect correction l matrixing/gain on each colour channel for colour purity l auto white balance, exposure and gain control l peaking for image clarity l gamma correction l colour space conversion (including hue and saturation control) from raw rgb to ycbcr[4:2:2]. 2.3 video compressor the video compression engine performs 3 main functions: l up scaling of input ycbcr 4:2:2 video stream from the vp (typically to scale from qvga to cif image formats) l compression and encoding of ycbcr stream into motion-jpeg (m-jpeg) format l fifo monitoring the data stream from the vp can be up to vga size. the scaler in vc can downsize this image. once scaled, the video stream is then converted into m-jpeg format. m-jpeg treats video as a series of jpeg still images. the conversion is released via a sequential dct (discrete cosine transform) with huffman encoding. after transfer through the digiport or over usb, the m-jpeg stream can be decoded in the host.
7/41 stv0674 stv0674 functional description the vc module varies the compression ratio to match the scene and selected frame rate, to the fifo fill state. the vc module is capable of compression ratios of up to 100:1. thumbnails can also be generated within the vc for potential display on an image lcd. the final stage of the vc block manages the data transfer rate from the local vc fifo store to the memory or usb core. the vc can perform this management automatically, by employing long-term (frame-level) and short-term (block-level) compression management. 2.4 microcontroller the stv0674 has an embedded high-performance 8052 8-bit microcontroller with 32k bytes of rom and 32kbytes of sram available for program memory. the device functionality provided by default program rom is generally sufficient to address all needs of a usb-tethered camera. in stv0674, code can be executed from the local sram as well as default rom. the default rom provides basic functions such as usb control, memory control, vp setup, systems installation, and the transfer of application specific code into the local sram. in non-tethered applications, the sram can be loaded from off-chip eeprom via i 2 c or from an external flash device. if required in tethered applications, the sram can be loaded from the host pc via the usb. the rom bootloader will load the application specific firmware code from one of the following sources, in order of priority: 1 eeprom. 2 nand flash. 3 pc host (in the case of a webcam). 2.5 memory interfaces 2.5.1 nand flash memory/smartmedia card interface the nand flash module for the stv0674 provides a dedicated interface to an external 32mbit to 1gbit nand flash chip, and/or 4mbyte to 128mbyte smartmedia card. nand flash devices can contain a number of bit errors, and the core may deteriorate over time. both occurrences are handled automatically by stv0674. a camera using nand flash for image storage has the advantage that it can be powered off (e.g. auto power off, or for changing batteries) without losing images. no serial eeprom is required as the application specific programme code can be stored in nand flash memory. note: 1 support for smc is for 3v3 cards. 5v cards are not supported. 2 standard digital camera file formats (e.g. dos file format, ssfdc) are not supported on smc cards at this time. 2.5.2 sdram interface the stv0674 can use sdram for image storage and is designed to operate with pc66 or better compliant devices and supports 16mbit, 64mbit and 128mbit parts in both the x16 sdram or x8 dram word widths. it is recommended that any sdram used have low self refresh i dd .
stv0674 functional description stv0674 8/41 2.5.3 eeprom interface the stv0674 supports up to 512kbit eeprom to hold application specific firmware code. also, in the case of a tethered only web cam, lower density eeproms (down to 1kbit) can be used to store information regarding custom usb product id, vendor id and power consumption. 2.6 audio record the audio record block consists of a 16bit delta-sigma adc using sampling frequencies of 8 khz, 11.025khz, 16khz, 22.05khz, 32khz, 44.1khz and 48khz, with either differential or single ended inputs. the sampled output can be 8 or 16 bit. 2.7 audio playback audio playback is achieved by an internal pulse width modulator with a sample rates of 8khz, 11.025khz, 16khz, 22.05khz, 32khz or 44.1khz, connected to either an external amplifier chip and loudspeaker/ headphone socket, or to a simple piezo buzzer. 2.8 usb pc interface the stv0674 includes a usb version 1.1 compliant universal serial bus interface which requires the minimum of additional hardware. the key features of this interface are: l compliant with usb protocol revision 1.1 l usb audio class compliant l usb protocol handling l usb device state handling l clock and data recovery from usb l bit stripping and bit stuffing functions l crc5 checking, crc16 generation and checking l serial to parallel conversion l twin bulk end points (in/out) usb drivers are supplied by st. for usb timing information, please refer to the usb specification v1.1. 2.9 power requirements stv0674 requires a 3v3 supply for i/o and a 1v8 supply for the core.
9/41 stv0674 stv0674 application examples 3 stv0674 application examples the initial stv0674 released by st microelectronics is supplied with generic firmware application code, to realise one of the following camera types. 3.1 64tqfp webcam with audio 3.1.1 overview this camera uses the minimum of external components and has no user interface, batteries or memory for image storage. it is used as a tethered video capture camera over usb, with simultaneous audio and video, and it is controlled entirely through pc drivers. the application specific firmware is downloaded from the pc. note: a custom usb pid/vid can be configured by the use of an eeprom, if required. 3.1.2 block diagram figure 1: block diagram (64tqfp webcam with audio) cmos sensor cif or vga lens + ir filter usb interface processor embedded memory to host pc video processor video compression micro (not for image store) audio interface usb cable stv0674 64tqfp audio pre-amp microphone memory interface external eeprom image array
stv0674 application examples stv0674 10/41 3.2 100tqfp tri-mode camera 3.2.1 overview a tri-mode camera based on stv0674 in 100tqfp can range from low-cost cameras containing an icon lcd status display, microphone/speaker, and small sdram chip (e.g. 16mbit), to an enhanced feature set camera containing a graphical image lcd display for image review, flashgun, audio record/playback, nand flash on the pcb, and a smartmedia flash memory socket. 3.2.2 block diagram figure 2: stv0674 (100tqfp tri-mode camera) lcd lcd image display nand flash lcd status icon display smartmedia flash card socket driver sdram x16 or x8 audio playback power amp buzzer cmos sensor cif or vga lens + ir filter 5 usb interface memory interface processor embedded memory microphone to host pc or video processor video compression micro (not for image store) audio interface external usb cable removable chip or memory stv0674 100tqfp user interface buttons/ switches lcd interface buttons interface image array + boot ee- -prom flash flashgun module enable/ trigger oem mbytes pictures seconds high med low quality lcd driver chip eeprom only required if no nand flash 23 pics 640x480
11/41 stv0674 detailed specifications 4 detailed specifications 4.1 stv0674 absolute maximum ratings 4.2 stv0674 dc characteristics description range unit operating temperature 0 to 70 a a. refer to the sensor datasheet to determine operating temperature range of complete application o c storage temperature -50 to 150 o c table 1: dc characteristics parameter description min typ. max units notes vddc primary power supply (core) 1.55 1.8 1.95 v note 4 vddi 3.3v power supply for on-chip usb transceiver and io 3.0 3.3 3.6 v vddp analog supply to the pll 1.60 1.8 2.0 v vdda analog supply to the audio front end 3.0 3.3 3.6 v i suspend core suspend current 6 a i/o suspend current 31.5 a pll suspend current 0 a note 5 audio suspend current 1.5 a i lowpower core low power current 12.5 ma note 6 i/o low power current 0.9 ma note 6 pll low power current 0.5 ma note 6 audio low power current 1.5 a note 6 i highpower core high power current 50.4 ma note 6 i/o high power current 5.7 ma note 6 pll high power current 0.5 ma note 6 audio high power current 5.1 ma note 6 v ilu usb differential pad d+/d- input low 0.8 v v ihu usb differential pad d+/d- input high (driven) 2.0 v v ihuz usb differential pad d+/d- input high (floating) 2.7 3.6 v v di usb differential pad d+/d- input sensitivity 0.2 v note 1
detailed specifications stv0674 12/41 note: 1 v di = |(d+) - (d-)| 2v cm includes v di range. 3 these figures apply to sfp, sensor_clk, sensor_scl, sensor_sda, test_mode and sensor_db. they do not apply to the xtal_in pad, these are specified separately. 4 in normal operation the actual device operating voltage is the worst case figure of the pll and core supplies, or 1.60v to 1.95v. 5 below measurable limits. 6 see section 4.9 v cm usb differential pad d+/d- common mode voltage 0.8 2.5 v note 2 v olu usb differential pad d+/d- output low voltage 0.0 0.3 v v ohu usb differential pad d+/d- output high voltage 2.8 3.6 v v ohu usb differential pad d+/d- output high voltage 2.8 3.6 v v crs usb differential pad d+/d- output signal cross over voltage 1.3 2.0 v zdrv driver output resistance 28 44 w v il cmos input low voltage (xtal_in) 0.631 v v ih cmos input high voltage (xtal_in) 1.123 v v hys hysteresis (xtal_in) 0.492 v v il cmos input low voltage (tc pad) 0.35vd d v note 3 v ih cmos input high voltage (tc pad) 0.65vd d v note 3 vhyst schmitt trigger hysteresis 0.4 v note 3 v t+ cmos schmitt input low to high threshold voltage (tc pad) 2.15 v note 3 v t- cmos schmitt input high to low threshold voltage (tc pad) 1.05 v note 3 v t threshold point (tc pad) 1.65 v note 3 v oh output high voltage (tc pad) 2.4 v v ol output low voltage (tc pad) 0.4 v table 1: dc characteristics parameter description min typ. max units notes
13/41 stv0674 detailed specifications 4.3 sdram interface read/write timing diagrams for external synchronous dram figure 3: sdram read timing dclk command dqm a0-9,ba a10 active read nop precharge nop row column row dout m dout m + 1 dout m + 2 dout m + 3 dq cas latency t ck t rcd t rc cke t ras dq sample dq sample dq sample dq sample t rp t cms t cmh t as t ah t cl t ch t cms t cmh t ac t oh
detailed specifications stv0674 14/41 note: 1 the sdram interface is designed to operate with sdram devices which are compliant with the intel sdram specification revision 1.7 november 1999. speed grades 66, 100 and 133mhz are compatible. 2 above timing assumes 20pf load per pad. figure 4: sdram write timing table 2: sdram timing symbol min typ. max units symbol min typ. max units t ck 41.67 ns t ds 20.12 ns t ch 20.11 20.83 21.55 t ck t dh 21.82 ns t cl 20.11 20.83 21.55 t ck t rcd 1t ck t ac 24.76 ns t ras 2t ck t oh 0nst rc 4t ck t cms 20.27 ns t rp 2t ck t cmh 20.02 ns t rrd 2t ck t as 20.67 ns t ah 19.79 ns dclk command dqm a0-9,ba a10 active write nop precharge nop row column row din m din m + 1 din m + 2 din m + 3 dq t ck t rcd t rc cke t ras t rp t cms t cmh t as t ah t cl t ch t cms t cmh t ds t dh
15/41 stv0674 detailed specifications 4.4 nand flash interface 4.4.1 command latch cycle for nand flash interface 4.4.2 address latch cycle for nand flash interface figure 5: command latch cycle figure 6: address latch cycle t cls t wp t clh t ds t dh command cle we_n ale io[7:0] ce_n t als t alh t cls t wp t wc t ds t dh a0-a7 cle we_n ale io[0:7] ce_n a9-a16 a17-a21 t wh t alh
detailed specifications stv0674 16/41 4.4.3 input data latch cycles for nand flash interface 4.4.4 sequential output cycle after read for nand flash interface figure 7: input data latch cycle figure 8: sequential out cycle after read t als t wp t clh t ds t dh din0 cle we_n io[0:7] ce_n din1 din511 t wh ale t wc dout re_n io[0:7] rb_n dout dout ce_n t rc t rp t reh t rea t rr
17/41 stv0674 detailed specifications 4.4.5 status read cycle for nand flash interface 4.4.6 read operation for nand flash interface figure 9: status read cycle figure 10: read operation t ds 70h cle re_n io[0:7] ce_n status we_n t cls t clh t cls t wp t whr t dh t rsto t wb cle re_n io[0:7] ce_n ale a0-7 00h a9-16 a17-21 rb_n dout0 dout1 dout2 we_n t r t rr
detailed specifications stv0674 18/41 4.4.7 reset operation for nand flash interface figure 11: reset operation cle io[0:7] ce_n ffh rb_n we_n t rst
19/41 stv0674 detailed specifications 4.4.8 ac characteristics for operation note: 1 all parameters relating to the ce_n signal are omitted as it is not enabled/disabled during execution of any nand flash operation. 2 all timings are worst case. 3 conforms to both samsung and toshiba specifications as outlined in datasheets table 3: ac characteristics symbol parameter min typical max unit t cls cle set-up time 61.36 62.4 ns t clh cle hold time 83.2 ns t wp we-n pulse width 83.2 ns t als ale set-up time 82.64 83.2 ns t alh ale hold time 82.44 83.2 ns t ds data set-up time 82.65 83.2 ns t dh data hold time 61.85 62.4 ns t wc write cycle time 145.09 145.6 ns t wh we_n high hold time 61.89 62.4 ns t rr ready to re_n low 80.99 83.2 ns t rp re_n pulse width 83.2 ns t rc read cycle time 187.2 ns t rea re_n access time 35 43.2 ns t reh re_n high hold time 103.47 104 ns t whr we_n high to re_n low 124.22 124.8 ns t r data transfer from cell to register 25.015 s t wb we_n high to busy 41.6 215.28 ns t rst device resetting (read) 5.015 s
detailed specifications stv0674 20/41 4.5 usb interface 4.5.1 ac electrical characteristics of usb transceiver all measurements are fully electrically compliant to chapter 7 (electrical requirements) of revision 2 of the usb specification for full-speed devices (v1.1). the transceiver has been tested with external impedance-matching series resistors (27 w +/-5%) between the pads and the usb cable. table 4: ac characteristics of usb transceiver parameter description min typ. max units transmit /output stage tlr fall time 4.45 5.82 7.31 ns tlf rise time 4.55 5.77 6.81 ns tlrfm rise and fall time matching 90 111 % system rpu usb differential pad dp, dn pullup resistor 1.425 1.575 k w rpd usb differential pad dp, dn pulldown resistor 14.25 15.75 k w
21/41 stv0674 detailed specifications 4.6 audio 4.6.1 audio adc electrical parameters 4.6.2 audio anti-aliasing filter characteristics table 5: audio/adc electrical characteristics symbol parameter test conditions min. typ. max. unit fclk clock frequency 12 mhz dutymclk clk duty cycle 40 60 % fs sample frequency 8 48 khz vbias bias reference voltage vbias / vcc = 3v 1.5 v rbias vbias impedance vbias 5 k w rin input impedance in+ / in- 50 k w cin input capacitance in+ / in- 10 pf dyn in input dynamic range adc out full scale in+ / in- gain 0db (agc off) 1.5 vpp snr* signal / noise ratio sinewave @fs - 3db gain 0db 82 db offset offset error after automatic calibration 100 lsb harm a a. input sine wave 1khz, fmclk 11.289 mhz, bw = 10hz-20 khz, a-weighting filters, output 16 bits raw pcm signal to peak harmonics sinewave @fs - 3db gain 0db 75 db sinewave @fs - 3db gain 24db 50 db psrr power supply rejection measured on adc output with a 1khz 100mvpp sinewave added to the 3.3v supply 40 lsbpp lfc low cut-off frequency gain 0db 15 hz hfc high cut-off frequency adc out 0.45 fs table 6: audio anti-aliasing filter characteristics symbol parameter test conditions min. typ. max. unit fpassband passband frequency fs is sampling frequency 0.45 fs ripplepass passband ripple 0->0.376fs -0.25 0.25 db fstopband stopband frequency fs is sampling frequency 0.6 fs
detailed specifications stv0674 22/41 4.7 sfp ac parameters each sfp is a ttl schmitt trigger bidirectional pad buffer, 3v3 capable with 2ma drive capability and slew-rate control. the 3.3v ios comply to the eia/jedec standard jesd8-b. for sake of convenience the most important parameters for measurement have been extracted and presented below. 4.8 sensor interface note: 1 the above timings assume that the sensor_clk load is 20pf. 2 the sensor data setup and hold times are requirements of the stv0674. 3 t ac represents the maximum allowed clock to data delay from stv0674 sensor_clk pad to the stv0674 sensor data pads. (i.e. stv0674 pad to sensor pcb delay + sensor clock to data delay + sensor data pad to stv0674 pad pcb delay). table 7: sfp ac parameters symbol description min. typ. max. unit slew_rise 0.3vcc to 0.6vcc, cl = 10pf, balanced rl = 1kr to vdd with rl = 1kr to vss 1.63 1.83 1.97 v/ns slew_fall 0.3vcc to 0.6vcc, cl = 10pf, balanced rl = 1kr to vdd with rl = 1kr to vss 2.05 2.32 2.62 v/ns figure 12: sensor interface timing table 8: sensor interface timing symbol min. typ. max. unit t ck 0.1875 24 mhz t ch 40.02 t ck t cl 40.02 t ck t ds 7.71 ns t dh 0ns t ac 32.39 ns sensor_clk sensor_db[4:0] t ck t cl t ch t ds t dh t ac
23/41 stv0674 detailed specifications 4.9 device current consumption in run and suspend modes the stv0674 power consumption has been estimated based on a webcam configuration. in this way, the analysis can specifically consider the devices intrinsic power consumption rather than that associated with other system-level components. as stv0674 typically ends up in very low usb or battery powered applications, it is important device power consumption is measured in three different operating modes representing typical operating conditions in the real application. these three modes shall be referred to as low power mode, high power mode and suspend mode. suspend mode is the is the lowest power mode of the device. for the core current, it can be effectively equated to static power consumption. in this mode, all embedded clocks are stopped and all embedded logic blocks, macros, ip, etc. are reset into their low power modes. the xtal oscillator pads (providing main clock source to entire stv0674) are also stopped. the name suspend mode historically comes from the devices requirement to comply with usb suspend mode where the total current drawn from the host pc by the usb peripheral is not allowed to exceed 500ua. in low power mode, the embedded vp and vc module clocks are disabled and held in reset. the vp and vc are the two most power-hungry modules in the stv0674. a limited number of modules are enabled in this mode to allow usb enumeration, system-level self-configuration or camera user- interface functions. such modules include the embedded microcontroller, usb core, memory sub- systems and sfp core. in high power mode. the vp and vc module clocks is enabled and are brought out of reset. this is more typical of the real device application in that video data is being generated and processed. in measured cases the vp and vc are set up to their fastest (worst-case power) modes of operation processing vga source data from the sensor at full 30 frames-per-second. note, the baseline device power model presented here can be extended to cover other system-level configurations. in such cases the core idd will remain as measured here (30fps/vga) but the i/o idd is more likely to vary depending on e.g. which memory type (sdram/nand) is being used. the power associated with each pin can be calculated based on its frequency (mhz), capacitive (c) and resistive (r) loading.
64tqfp pinout and pin descriptions stv0674 24/41 5 64tqfp pinout and pin descriptions 5.1 64tqfp device pinout figure 13: representative pinout in 64tqfp vddi_1 sfp20 vddc_1 vddi_3 vddi_4 vddc_3 vddc_2 ap vddp vss_2 cbs vss_4 vss_3 vss_7 vss_1 vss_5 reset vssp vddi_3 vss_6 vdda sdata0 sdata1 sdata2 sdata3 sdata4 sclk ssda sscl dp dn sfp24 tm0 tm2 xtali xtalo vc tm1 sfp0 sfp1 sfp2 sfp3 sfp4 sfp5 sfp6 sfp7 sfp8 sfp9 sfp10 sfp11 sfp12 sfp13 sfp14 sfp16 sfp17 sfp15 sfp18 sfp19 wakeup sfp23 sfp21 sfp22 vssa an stv0674-64tqfp (10x10) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
25/41 stv0674 64tqfp pinout and pin descriptions figure 14: signals identified by functional group, 64tqfp power inputs: core i/o pll audio grounds: common pll audio 3 7 4 ap sensor interface 5 vddi vddc vddp vdda vss vssp vssa sdata sscl ssda sclk pll and clock: vc xtlo xtli audio an cbs test tm 3 interrupt/ control reset wakeup special function pins usb interface sfp dn dp 25 stv0674
64tqfp pinout and pin descriptions stv0674 26/41 5.2 64tqfp pin description table 9: pin description- 64tqfp package pin pin name type description clocks and resets 26, 27 xtli, xtlo osc crystal oscillator pad pair, see figure 19 35 reset i s reset input (schmitt input level, active low) power supplies 17, 63, 46 vddc_1, vddc_2, vddc_3 pwr core power supply - 1v8 3, 51, 39, 28 vddi_1, vddi_2,vddi_3, vddi4 pwr i/o power supply - 3v3 18, 2, 62, 50, 45, 36, 29 vss_1, vss_2, vss_3, vss_4, vss_5, vss_6, vss_7 gnd common ground. pll power and filter pins 23 vddp pwr master and audio pll supplies - 1v8 24 vssp gnd master and audio pll supplies - 0v 21 vc ana audio pll filter, see figure 20 audio front-end (adc) power 12 vdda pwr audio front end supply - 3v3 16 vssa gnd audio front-end supply - 0v sensor interface 4 sclk o camera clock (2ma cmos) 5, 6, 7, 8, 9 sdata[4:0] i 5-bit sensor video data 10 ssda i/o sensor i 2 c data 11 sscl o sensor i 2 c clock usb interfaces 38 dp i/o usb differential d+ 37 dn i/o usb differential d- wakeup/button 33 wakeup i remote wakeup/ twain upload test pins 25, 22, 20 tm[2:0] i test mode pins - must be pulled high
27/41 stv0674 64tqfp pinout and pin descriptions table 10: hardware specific special function pins audio front-end inputs, and bias pins 13 ap ana vin+ 15 an ana vin- 14 cbs ana vbias, see figure 20 special function pins 56, 57, 58, 59, 60, 61, 64, 1 sfp[7:0] sfp special function pin operation is firmware specific. 44, 47, 48, 49, 52, 53, 54, 55 sfp[15:8] sfp special function pin operation is firmware specific. 30, 31, 32, 34, 40, 41, 42, 43 sfp[23:16] sfp special function pin operation is firmware specific. 19 sfp[24] sfp special function pin operation is firmware specific. special function pins a pin pin name other description 1 sfp[0] pwm0/ tqfp_sel audio playback output / determines if device is either 100tqfp or 64tqfp b 64 sfp[1] gpio 61 sfp[2] gpio 60 sfp[3] gpio 59 sfp[4] gpio 58 sfp[5] gpio 57 sfp[6] gpio 56 sfp[7] gpio 55 sfp[8] gpio 54 sfp[9] shutter gpio c 53 sfp[10] gpio 52 sfp[11] gpio 49 sfp[12] gpio 48 sfp[13] gpio 47 sfp[14] power_on output reserved for power latching d table 9: pin description- 64tqfp package pin pin name type description
64tqfp pinout and pin descriptions stv0674 28/41 44 sfp[15] gpio 43 sfp[16] gpio 42 sfp[17] gpio 41 sfp[18] gpio 40 sfp[19] gpio e 34 sfp[20] gpio 32 sfp[21] gpio 31 sfp[22] gpio 30 sfp[23] gpio 19 sfp[24] gpio a. sfp 0-24 default to inputs on reset and in low power states. no sfp pin should therefore be left floating. all sfp pins must be configured by external circuit. b. sfp 0> 64tqfp device pull down/ 100tqfp pull up, see section 6.2.1 . c. sfp 9> pull down required if pin not used. must be low at power on. d. sfp 14> pull down required for power latching otherwise pull up required e. sfp 19> pull down required. special function pins a pin pin name other description
29/41 stv0674 64tqfp pinout and pin descriptions 5.3 64tqfp package details figure 15: 64tqfp package details weight: 0.30gr body: 10 x 10 x 1.40mm tqfp64 dim. mm inch min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.18 0.23 0.28 0.007 0.009 0.011 c 0.12 0.16 0.20 0.0047 0.0063 0.0079 d 12.00 0.472 d1 10.00 0.394 d3 7.50 0.295 e 0.50 0.0197 e 12.00 0.472 e1 10.00 0.394 e3 7.50 0.295 l 0.40 0.60 0.75 0.0157 0.0236 0.0295 l1 1.00 0.0393 k 0 (min.), 7 (max.) a a2 a1 b c 16 17 32 33 48 49 64 e3 d3 e1 e d1 d e 1 k b tqfp64 l l1 seating plane 0.10mm october 1997 0051434 ? outline and mechanical data
100tqfp pinout and pin descriptions stv0674 30/41 6 100tqfp pinout and pin descriptions 6.1 100tqfp device pinout figure 16: stv0674 pinout in 100tqfp sfp20 vddc_3 vss_4 reset vddi_3 vss_5 dp/rxd dn sfp42 sfp43 sfp41 sfp40 sfp39 sfp13 sfp14 sfp16 sfp17 sfp15 sfp18 sfp19 sfp44 sfp45 wakeup sfp46 sfp47 stv0674-100tqfp (14x14) vddi_1 ap vss_1 cbs vdda sdata0 sdata1 sdata2 sdata3 sdata4 sclk ssda sscl sfp26 sfp25 sfp0 sfp27 sfp28 sfp29 sfp59 sfp58 sfp57 sfp60 vssa an vddc_1 vddi_4 vddp vss_6 vss_7 vssp sfp24 tm0 tm2 xtali xtalo vc tm1 sfp56 sfp55 sfp54 sfp53 sfp52 sfp23 sfp21 sfp51 sfp50 sfp49 sfp48 sfp22 vddi_2 vddc_2 vss_3 vss_2 sfp30 sfp31 sfp32 sfp33 sfp34 sfp1 sfp2 sfp3 sfp4 sfp5 sfp6 sfp7 sfp8 sfp9 sfp10 sfp11 sfp12 sfp35 sfp36 sfp37 sfp38 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 32 33 34 35 36 37 38 26 39 40 41 42 43 44 45 46 47 48 49 50 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 99 98 97 96 95 94 93 92 91 90 89 88 100 87 86 85 84 83 82 81 80 79 78 77 76
31/41 stv0674 100tqfp pinout and pin descriptions figure 17: signals identified by functional group, 100tqfp power inputs: core i/o pll audio grounds: common pll audio 3 7 4 ap sensor interface 5 vddi vddc vddp vdda vss vssp vssa sdata sscl ssda sclk pll and clock: vc xtlo xtli audio an cbs test tm 3 interrupt/ control reset wakeup special function pins usb interface sfp dn dp 61 stv0674
100tqfp pinout and pin descriptions stv0674 32/41 6.2 100tqfp pin descriptions table 11: pin description - 100tqfp package pin pin name type description clocks and resets 40, 41 xtli, xtlo osc crystal oscillator pad pair, see figure 19 57 reset i s reset input (schmitt input level, active low) power supplies 31, 94, 68 vddc_1, vddc_2, vddc_3 pwr core power supply - 1v8 8, 82, 61, 42 vddi_1, vddi_2,vddi_3, vddi4 pwr i/o power supply - 3v3 7, 93, 81, 67, 58, 43, 32 vss_1, vss_2, vss_3, vss_4, vss_5, vss_6, vss_7 gnd common ground. pll power and filter pins 37 vddp pwr master and audio pll supplies - 1v8 38 vssp gnd master and audio pll supplies - 0v 35 vc ana audio pll filter, see figure 20 audio front-end (adc) power 17 vdda pwr audio front end supply - 3v3 21 vssa gnd audio front-end supply - 0v sensor interface 9 sclk o camera clock (2ma cmos) 10, 11, 12, 13, 14 sdata[4:0] i 5-bit sensor video data 15 ssda i/o sensor i 2 c data (schmitt input level) 16 sscl o sensor i 2 c clock usb interfaces 60 dp i/o usb differential d+ 59 dn i/o usb differential d- test pins 39, 36, 34 tm[2:0] i test mode pins - must be pulled high user button inputs/wakeup 55 wakeup i could be used as wake-up button on sdram camera while untethered.
33/41 stv0674 100tqfp pinout and pin descriptions audio front-end input, and bias pins 18 ap ana vin+ 20 an ana vin- 19 cbs ana vbias, see figure 20 special function pins 87, 88, 89, 90, 91, 92, 95,6 sfp[7:0] sfp special function pin operation is firmware specific. 66, 69, 70, 80, 83, 84, 85,86 sfp[15:8] sfp special function pin operation is firmware specific. 44, 45, 46, 56, 62, 63, 64, 65 sfp[23:16] sfp special function pin operation is firmware specific. 99, 100, 1, 2, 3, 4, 5, 33 sfp[31:24] sfp special function pin operation is firmware specific. 75, 76, 77, 78,79, 96, 97, 98 sfp[39:32] sfp special function pin operation is firmware specific. 51, 52, 53, 54, 71, 72, 73, 74 sfp[47:40] sfp special function pin operation is firmware specific. 27, 28, 29, 30, 47, 48, 49, 50 sfp[55:48] sfp special function pin operation is firmware specific 22, 23, 24, 25, 26, sfp[60:56] sfp special function pin operation is firmware specific. table 11: pin description - 100tqfp package pin pin name type description
100tqfp pinout and pin descriptions stv0674 34/41 table 12: hardware specific - special function pins special function pins a pin pin name sdram x8 sdram x16 flash other description 6 sfp[0] pwm0/ tqfp_sel audio playback output / determines if device is either 100tqfp or 64tqfp b 95 sfp[1] gpio 92 sfp[2] gpio 91 sfp[3] cs_nand nand/smc detect c 90 sfp[4] gpio 89 sfp[5] gpio 88 sfp[6] gpio 87 sfp[7] gpio 86 sfp[8] gpio 85 sfp[9] shutter gpio d 84 sfp[10] gpio 83 sfp[11] gpio 80 sfp[12] gpio 70 sfp[13] gpio 69 sfp[14] power_on output reserved for power latching e 66 sfp[15] gpio 65 sfp[16] cs_smc chip select for smc f 64 sfp[17] gpio 63 sfp[18] gpio 62 sfp[19] gpio 56 sfp[20] gpio 46 sfp[21] gpio 45 sfp[22] 44 sfp[23] dq1 gpio /sdramx16 33 sfp[24] dq3 gpio /sdramx16 5 sfp[25] dq5 io0 gpio /nand flash /sdramx16 4 sfp[26] dq7 io1 gpio /nand flash /sdramx16 3 sfp[27] dq8 io2 gpio /nand flash /sdramx16 2 sfp[28] dq10 io3 gpio /nand flash /sdramx16 1 sfp[29] dq12 io4 gpio /nand flash /sdramx16 100 sfp[30] dq14 io5 gpio /nand flash /sdramx16 99 sfp[31] dqml io6 gpio /nand flash /sdramx16
35/41 stv0674 100tqfp pinout and pin descriptions 98 sfp[32] dq0 dq0 io7 gpio /nand flash /sdramx16 / sdramx8 97 sfp[33] dq1 dq2 gpio /sdramx16 /sdramx8 96 sfp[34] dq2 dq4 gpio /sdramx16 /sdramx8 79 sfp[35] dq3 dq6 we gpio /nand flash /sdramx16 / sdramx8 78 sfp[36] dq4 dq9 ale gpio /nand flash /sdramx16 / sdramx8 77 sfp[37] dq5 dq11 cle gpio /nand flash /sdramx16 / sdramx8 76 sfp[38] dq6 dq13 rb gpio /nand flash /sdramx16 / sdramx8 (open drain) g 75 sfp[39] dq7 dq15 re gpio /nand flash /sdramx16 / sdramx8 74 sfp[40] a0 a0 gpio /sdramx16 /sdramx8 73 sfp[41] a1 a1 gpio /sdramx16 /sdramx8 72 sfp[42] a2 a2 gpio /sdramx16 /sdramx8 71 sfp[43] a3 a3 gpio /sdramx16 /sdramx8 54 sfp[44] a4 a4 gpio /sdramx16 /sdramx8 53 sfp[45] a5 a5 gpio /sdramx16 /sdramx8 52 sfp[46] a6 a6 gpio /sdramx16 /sdramx8 51 sfp[47] a7 a7 gpio /sdramx16 /sdramx8 50 sfp[48] a8 a8 gpio /sdramx16 /sdramx8 49 sfp[49] a9 a9 gpio /sdramx16 /sdramx8 48 sfp[50] a10 a10 gpio /sdramx16 /sdramx8 47 sfp[51] a11 a11 gpio /sdramx16 /sdramx8 30 sfp[52] a12 a12 gpio /sdramx16 /sdramx8 29 sfp[53] a13 a13 gpio /sdramx16 /sdramx8 28 sfp[54] clk clk gpio /sdramx16 /sdramx8 27 sfp[55] cke cke gpio /sdramx16 /sdramx8 26 sfp[56] dqm dqmh gpio /sdramx16 /sdramx8 25 sfp[57] ras ras gpio /sdramx16 /sdramx8 24 sfp[58] cas cas gpio /sdramx16 /sdramx8 23 sfp[59] we we gpio /sdramx16 /sdramx8 22 sfp[60] cs cs sdram detect and chip select for sdram h table 12: hardware specific - special function pins special function pins a pin pin name sdram x8 sdram x16 flash other description
100tqfp pinout and pin descriptions stv0674 36/41 6.2.1 power on/ low power default pin states the initial state of sfp pins varies depending on the power on state of the nand flash / smc detect pin, sdram detect pin and package detect pin, in each case the default pin states are detailed in the table below. a. sfp 0-22 default to inputs on reset and in low power states. sfp 0-22 should therefore not be left floating and must be configured by external circuit. see section 6.2.1 for state of sfp 23-60 b. sfp 0> 64tqfp device pull down/ 100tqfp pull up, see section 6.2.1 . c. sfp 3> pull up if nand or smc present /down if not, see section 6.2.1 . d. sfp 9> pull down required if pin not used, must be held low at power on. e. sfp 14> pull down required for power latching otherwise pull up required. f. sfp 16> pull up required, if smc present. (sfp 3 must also be pulled up) g. sfp 38> pull resistor required if nand present, value 10k w . h. sfp 60> pull up if sdram present /down if not, see section 6.2.1 pin state at power on initial state tqfp_sel cs_nand cs_sdram flash port non-flash sdram gpio sfp0 sfp3 sfp60 sfp 25-32, 35-39 sfp 23, 24, 33, 34, 40-60 sfp0-22 0 x x n/a 23,24 input, others n/a input 1 1 0 ouput input input 1 x 1 output output input 1 0 0 input input input
37/41 stv0674 100tqfp pinout and pin descriptions 6.3 100tqfp package details figure 18: 100tqfp p ackage details dim. mm inch min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.17 0.22 0.27 0.007 0.009 0.011 c 0.09 0.20 0.003 0.008 d 16.00 0.630 d1 14.00 0.551 d3 12.00 0.472 e 0.50 0.019 e 16.00 0.630 e1 14.00 0.551 e3 12.00 0.472 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.0393 k3.5 (min.), 7 (max.) tqfp100 a a2 a1 seating plane c 25 26 50 51 75 76 100 d3 d1 d e 1 b tqfp 100m 0.076mm .003 inch pin 1 identification k l l1 e3 e1 e october 1997 0086901 ? outline and mechanical data
100tqfp pinout and pin descriptions stv0674 38/41 6.4 external circuits 6.4.1 crystal oscillator there are 2 crystal oscillator pins xtal_in, xtal_out, as shown in figure 19. the oscillator cell architecture is a single stage oscillator with an inverter working as an amplifier. the oscillator stage is biased by an internal resistor (>1m w ). it also requires an external pi network consisting of a crystal and two capacitors. note: the clock accuracy of the oscillator circuit must be within the usb compliance data signaling rate tolerance of 12.000mb/s 0.25%. 6.4.2 audio if the record audio section of the stv0674 is not required, ap, cbs, vc and an can be left unconnected. vdda must however be connected to a 3v3 supply. 6.4.3 recommended power supply decoupling a 0.1 m f bypass capacitor located as close as possible to the chip package connecting between all vdd pins and gnd and at least one bulk decoupling capacitor on each of the supply rails vdda, vddc, vddi and vddp. figure 19: oscillator support circuit figure 20: audio pll filter and cbs xtalo xtali 15pf crystal 15pf 10k 10nf 680pf 10uf + _ vc cbs
39/41 stv0674 evaluation kits and reference design manual 7 evaluation kits and reference design manual 7.1 evaluation kit stmicroelectronics recommends the use of their evaluation kit (evk) for initial evaluation and design-in. the kit contains all the hardware functionality required to implement a webcam, dual mode and tri mode camera and is populated with sdram, nand flash as well as a smartmedia connector. 7.1.1 contents each evk contains l stv0674 evaluation board with both cif and vga sensor plug-in l usb cable l pc software l user manual 7.1.2 reference design manual the stmicroelectronics stv0674 reference design manual includes complete schematics, bom and design recommendations. for products based on the stv0674 stmicroelectronics recommends that all designers refer to the reference design manual before starting on a new design. please contact stmicroelectronics for more details.
ordering details stv0674 40/41 8 ordering details technical support technical support information, such as datasheets, software downloads, etc. can be found at http://www.st.com under imaging products. table 13 : ordering details part number description devices stv0674t100 digital video co-processor (100tqfp package) STV0674T064 digital video co-processor (64tqfp package) evaluation kits (evks) stv-674/100t-e01 100tqfp stv0674 + cif and vga sensors
41/41 stv0674 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this p ublication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - brazil - china - finland - france - germany - hong kong - india - italy - japan malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. www.st.com

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